Digital Teaching Aid (DED Philippinen, 86 p.)
 Flip-Flops - Lesson 7
 Lesson Plan
 (introduction...) Introduction RS Flip-Flops D - Flip-Flop (D-FF) JK Flip-Flop (JK-FF)

### RS Flip-Flops

A Flip-Flop is a bistable electronic circuit that has two stable states.

Þ Output is either 0 or 5V dc

The Flip-Flop can be regarded as a memory device. It can be used to store one binary digit at the output.

Fig. 7-1: RS Flip-Flop, logic circuit and device symbol

HO: What is the truth table for the circuit above?

Solution:

Fig. 7-2: Truth table, RS Flip-Flop

 R S Q Action 0 0 Last value No change 0 1 1 Set 1 0 0 Reset 1 1 ? Forbidden

If both inputs (R, S) are high at once, the output can not be determined before; therefore, it is a forbidden state.

Ex: Create a RS Flip-Flop with NAND gates.

Fig. 7-3: RS Flip-Flop with NAND gates

Note: The inputs (R, S) are indicated with an overbar so they are inverted.

Fig. 7-4: Logic symbol, RS Flip-Flop with inverted inputs

Clocked RS Flip-Flop

Fig. 7-5: Clocked RS Flip-Flop

This Flip-Flop ca be enabled or disabled.

ENABLE ® low: R and S will have no effect on the output

ENABLE ® high: R and S inputs will be directly transmitted to the output

Fig. 7-6: Logic symbol, Clocked RS Flip-Flop

Timing diagram

A timing diagram is a drawing to determine the time dependent actions of logic devices.

Fig. 7-7: Timing diagram of a clocked RS Flip-Flop

Fig. 7-7 shows that the inputs (R, S) effect the output (Q) only when the clock signal (CLK) is high.

RS Flip-Flop application: Bounce free switch