![]() | Digital Teaching Aid (DED Philippinen, 86 p.) |
![]() | ![]() | (introduction...) |
![]() | ![]() | Preface |
![]() | ![]() | Introduction |
![]() | ![]() | Fundamental Logic Operations - Lesson 1 |
![]() | ![]() | Lesson Plan |
![]() | ![]() | (introduction...) |
![]() | ![]() | Introduction |
![]() | ![]() | TTL circuits |
![]() | ![]() | Logic operations |
![]() | ![]() | Handout No. 1 |
![]() | ![]() | Worksheet No. 1 |
![]() | ![]() | Introduction Boolean Algebra - Lesson 2 |
![]() | ![]() | Lesson Plan |
![]() | ![]() | Introduction |
![]() | ![]() | Boolean algebra |
![]() | ![]() | Boolean equations of logic circuits |
![]() | ![]() | NOR and NAN gates |
![]() | ![]() | De Morgan's theorems |
![]() | ![]() | Worksheet No. 2 |
![]() | ![]() | Circuit Analysis and Design - Lesson 3 |
![]() | ![]() | Lesson Plan |
![]() | ![]() | (introduction...) |
![]() | ![]() | Introduction |
![]() | ![]() | Boolean laws and theorems |
![]() | ![]() | Sum of product method |
![]() | ![]() | Design example |
![]() | ![]() | Handout No. 2 |
![]() | ![]() | Worksheet No. 3 |
![]() | ![]() | First Evaluation |
![]() | ![]() | Karnaugh Mapping - Lesson 4 |
![]() | ![]() | Lesson Plan |
![]() | ![]() | (introduction...) |
![]() | ![]() | Introduction |
![]() | ![]() | Karnaugh map |
![]() | ![]() | Truth table to Karnaugh map |
![]() | ![]() | Pairs, Quads, and Octets |
![]() | ![]() | Overlapping and Rolling |
![]() | ![]() | Worksheet No. 4 |
![]() | ![]() | Karnaugh Mapping II - Lesson 5 |
![]() | ![]() | Lesson Plan |
![]() | ![]() | (introduction...) |
![]() | ![]() | Introduction |
![]() | ![]() | Product of sums method |
![]() | ![]() | Don't care conditions |
![]() | ![]() | Worksheet No. 5 |
![]() | ![]() | Coding - Lesson 6 |
![]() | ![]() | Lesson Plan |
![]() | ![]() | (introduction...) |
![]() | ![]() | Introduction |
![]() | ![]() | ASCII code |
![]() | ![]() | Excess-3 code |
![]() | ![]() | Gray code |
![]() | ![]() | Encoder |
![]() | ![]() | Decoder |
![]() | ![]() | Code converter |
![]() | ![]() | Worksheet No. 6 |
![]() | ![]() | Flip-Flops - Lesson 7 |
![]() | ![]() | Lesson Plan |
![]() | ![]() | (introduction...) |
![]() | ![]() | Introduction |
![]() | ![]() | RS Flip-Flops |
![]() | ![]() | D - Flip-Flop (D-FF) |
![]() | ![]() | JK Flip-Flop (JK-FF) |
![]() | ![]() | Worksheet No. 7 |
![]() | ![]() | Second Evaluation |
![]() | ![]() | Counter - Lesson 8 |
![]() | ![]() | Lesson Plan |
![]() | ![]() | (introduction...) |
![]() | ![]() | Introduction |
![]() | ![]() | Asynchronous counter |
![]() | ![]() | Synchronous counter |
![]() | ![]() | Seven segment indicator and decoder |
![]() | ![]() | Worksheet No. 8 |
![]() | ![]() | Data Processing Circuits - Lesson 9 |
![]() | ![]() | Lesson Plan |
![]() | ![]() | (introduction...) |
![]() | ![]() | Introduction |
![]() | ![]() | Multiplexer |
![]() | ![]() | Demultiplexer |
![]() | ![]() | Handout No. 3 |
![]() | ![]() | Worksheet No. 9 |
![]() | ![]() | Third Evaluation |
![]() | ![]() | Answers to Evaluation Problems |
No. 1 A JK master slave FF has its inputs tied to + 5V, and a series of pulses are applied to its CLK input Describe the Q output.
Figure
No. 2 The signal drives a clocked RS - FF. If Q is low before point A in time: At what point does Q becomes a 1? What does Q reset to 0?
Figure
No. 3 Use the information in the preceding problem and draw the waveform Q.
No. 4 The signal drives a D-FF. What is the value of stored in the FF after the clock pulse is over?
Figure
No. 5 A normal JK-FF, J = K = 1. A 1 MHz is applied to the CLK input it has a propagation delay tp of 50 ns. Draw the input squarewave and the out put expected at Q. Be sure to show the propagation delay time.