Titel: Counter
Objectives:
 Understand the principle of asynchronous and synchronous counter
 Able to design asynchronous counter
 Know the seven segment principle
Time 
Method 
Topic 
Way 
Remark  


* Review Lesson 7 
  
 
* Introduction 
  
 
* Asynchronous counter    
 

 Timing diagram 
 
 

 Truth table 
 
 

 Countdown mode 
 
 
* Synchronous counter    
 
* Seven Segment Indicator and Decoder  
 
  
 Common anode indicator   
 

 Common cathode indicator   
 

 Seven segment decoder   
 
* Review Exercise 

Worksheet No. 8  

S: Speech  
B: Boardscript 

Counter
Counters are beside the logic operations the basic elements of all digital controls.
Since the clock pulses occur at known intervals, the counter can be used as an instrument for measuring time and therefore period or frequency.
On principle there are two counting organisations:
 Asynchronous (serial, ripple) counter
Each FlipFlop is triggered by the previous FlipFlop, and thus the counter has a cumulative settling time. (Delay time, tp)
 Synchronous (parallel) counter
Here, every FlipFlop is triggered by the clock (synchronous), and thus the settling time is simply equal to the delay time of a single FlipFlop.
Fig. 81: Asynchronous counter
with JKMSFF in toggle mode
To understand how this counter works lets have a look at the timing diagram:
Fig. 82: Timing diagram,
asynchronous mod 8 counter
The frequency of waveform C is one half that at B, but is only oneeighth the clock frequency.
The FF's are negative edge triggered, hence output signals change only at the falling side of the clock pulse.
Fig. 83: Truth table, asynchronous mod 8 counter
CLK transition 
C 
B 
A 
0 
0 
0 
0 
1 
0 
0 
1 
2 
0 
1 
0 
3 
0 
1 
1 
4 
1 
0 
0 
5 
1 
0 
1 
6 
1 
1 
0 
7 
1 
1 
1 
0 
0 
0 
0 
A three FlipFlop counter is often referred to as a mod 8 (modulus 8) counter since it has 8 states.
2^{3} = 8 output conditions 
(The exponent equals to the number of FlipFlops) 
The largest decimal number which is represented by a 3 FlipFlop counter is:

2^{3}  1 = 7 
In general: 
2^{n}  1 
Count Down mode
Switching the clock inputs of each FlipFlop to the _{} outputs causes the counting sequence to start at 111 down to 000.
HO: How many FlipFlops are required to construct a mod128 counter? A mod32? What is the largest decimal number that can be stored in a mod64 counter?
Solution:
* mod128 must have 7 FlipFlops (27 = 128)
* mod32 must have 5 FlipFlops
* mod64, the largest decimal number is 63
Fig. 84: Synchronous counter,
with JKMSFF in toggle mode
The negative clock transistion is the mechanism that toggles each FF. Therefore, whenever a FlipFlop changes state, it toggles at exactly the same time as all the other FlipFlops. In other words, all FlipFlops change state in synchronism. This advantage needs an increase in hardware (additional gates), hence the asynchronous counter is the cheaper solution for time uncritical applications.
Seven segment indicators
Seven segment indicators are made by seven LED's. LED's are light emitting diodes. (LED function: Free electrons recombine with holes near the junction. As the free electrons “fall” from a higher energy level to lower one, they give up energy in form of heat and light)
Fig. 85: seven LED's labeled a
through g
Depending on which LED's are light up it is possible to indicate decimal numbers from 0 to 9.
Fig. 86: Seven segment indicator,
common anode type
Two types of indicators are available:
 common anode
 common cathode
The diodes are controlled by ground (common anode) or by 5V (common cathode).
Fig. 87: Seven segment indicator,
common cathode type
Seven segment decoder
Seven segment decocer are devices to drive seven segment indicators.
Ex: The 7448
(see Fig. 88 on the next page)
Fig. 88: Seven segment indicator
and decoder
The 7448 is a decoder to drive common cathode indicators.
When the BCD input is set to:
A B C D = 0 1 0 0
The internal logic of the decoder forces the LED's b, c, f, and g to conduct.
No. 1 Draw the logic diagram, truth table, and the waveform for a three flipflop serial counter that uses JK master slave flipflops sensitive to positive clock transition.
No. 2 Determine the number of possible states in a counter composed of the following number of flipflops:
a) 5
b) 8
c) 11
No. 3 Draw the logic diagram, truth table, and waveforms for a two flipflop serial counter operating in the count down mode.
No. 4 Design the internal logic circuit for the 7448 (seven segment decoder for the common cathode indicator).
No. 5 Sketch the logic circuit for the following seven segment indicators:
a) common cathode type
b) common anode type