  Digital Teaching Aid (DED Philippinen, 86 p.)  Counter - Lesson 8 ### (introduction...)

Titel: Counter

Objectives:

- Understand the principle of asynchronous and synchronous counter
- Able to design asynchronous counter
- Know the seven segment principle

 Time Method Topic Way Remark * Review Lesson 7 * Introduction * Asynchronous counter - Timing diagram - Truth table - Countdown mode * Synchronous counter * Seven Segment Indicator and Decoder - Common anode indicator - Common cathode indicator - Seven segment decoder * Review Exercise Worksheet No. 8 S: SpeechD: DiscussionQ/A: Question/AnswerF: Exercise B: BoardscriptP: PictureEx: ExampleHO: Hands-OnWS: WorksheetHT: Hand-Out

### Introduction

Counter

Counters are beside the logic operations the basic elements of all digital controls.

Since the clock pulses occur at known intervals, the counter can be used as an instrument for measuring time and therefore period or frequency.

On principle there are two counting organisations:

- Asynchronous (serial, ripple) counter

Each Flip-Flop is triggered by the previous Flip-Flop, and thus the counter has a cumulative settling time. (Delay time, tp)

- Synchronous (parallel) counter

Here, every Flip-Flop is triggered by the clock (synchronous), and thus the settling time is simply equal to the delay time of a single Flip-Flop.

### Asynchronous counter Fig. 8-1: Asynchronous counter with JK-MS-FF in toggle mode

To understand how this counter works lets have a look at the timing diagram: Fig. 8-2: Timing diagram, asynchronous mod 8 counter

The frequency of waveform C is one half that at B, but is only one-eighth the clock frequency.

The FF's are negative edge triggered, hence output signals change only at the falling side of the clock pulse.

Fig. 8-3: Truth table, asynchronous mod 8 counter

 CLK transition C B A 0 0 0 0 1 0 0 1 2 0 1 0 3 0 1 1 4 1 0 0 5 1 0 1 6 1 1 0 7 1 1 1 0 0 0 0

A three Flip-Flop counter is often referred to as a mod 8 (modulus 8) counter since it has 8 states.

 23 = 8 output conditions (The exponent equals to the number of Flip-Flops)

The largest decimal number which is represented by a 3 Flip-Flop counter is:

 23 - 1 = 7 In general: 2n - 1

Count Down mode

Switching the clock inputs of each Flip-Flop to the outputs causes the counting sequence to start at 111 down to 000.

HO: How many Flip-Flops are required to construct a mod-128 counter? A mod-32? What is the largest decimal number that can be stored in a mod-64 counter?

Solution:

* mod-128 must have 7 Flip-Flops (27 = 128)
* mod-32 must have 5 Flip-Flops
* mod-64, the largest decimal number is 63

### Synchronous counter Fig. 8-4: Synchronous counter, with JK-MS-FF in toggle mode

The negative clock transistion is the mechanism that toggles each FF. Therefore, whenever a Flip-Flop changes state, it toggles at exactly the same time as all the other Flip-Flops. In other words, all Flip-Flops change state in synchronism. This advantage needs an increase in hardware (additional gates), hence the asynchronous counter is the cheaper solution for time uncritical applications.

### Seven segment indicator and decoder

Seven segment indicators

Seven segment indicators are made by seven LED's. LED's are light emitting diodes. (LED function: Free electrons recombine with holes near the junction. As the free electrons “fall” from a higher energy level to lower one, they give up energy in form of heat and light) Fig. 8-5: seven LED's labeled a through g

Depending on which LED's are light up it is possible to indicate decimal numbers from 0 to 9. Fig. 8-6: Seven segment indicator, common anode type

Two types of indicators are available:

- common anode
- common cathode

The diodes are controlled by ground (common anode) or by 5V (common cathode). Fig. 8-7: Seven segment indicator, common cathode type

Seven segment decoder

Seven segment decocer are devices to drive seven segment indicators.

Ex: The 7448

(see Fig. 8-8 on the next page) Fig. 8-8: Seven segment indicator and decoder

The 7448 is a decoder to drive common cathode indicators.

When the BCD input is set to:

A B C D = 0 1 0 0

The internal logic of the decoder forces the LED's b, c, f, and g to conduct.

### Worksheet No. 8

No. 1 Draw the logic diagram, truth table, and the waveform for a three flip-flop serial counter that uses JK master slave flip-flops sensitive to positive clock transition.

No. 2 Determine the number of possible states in a counter composed of the following number of flip-flops:

a) 5
b) 8
c) 11

No. 3 Draw the logic diagram, truth table, and waveforms for a two flip-flop serial counter operating in the count down mode.

No. 4 Design the internal logic circuit for the 7448 (seven segment decoder for the common cathode indicator).

No. 5 Sketch the logic circuit for the following seven segment indicators:

a) common cathode type
b) common anode type