2 Energy Index
The energy dissipation of a CMOS circuit is dependent on the supply voltage: the speed of operation and the energy required to charge capacitors increases at higher voltages. In order to evaluate the energy efficiency of a high-level circuit description, we need a measure of energy dissipation that is independent of the supply voltage. In this section, we derive such an index of performance, and use it in the next section to justify an energy model for asynchronous circuits based on the energy cost of communication actions.
2.1 Sources of energy dissipation
CMOS circuits have three main sources of energy
dissipation: leakage currents, short-circuit currents,
and dynamic currents. The total energy dissipated
during the execution of one operation, ET , can be calculated
ET = Es + Ed +Esc (1)
where Es is the energy dissipated by the sub-threshold leakage currents, Ed is the energy used for charging and discharging capacitors, and Esc is the energy dissipated by the short-circuit currents.
Leakage currents come from the sub-threshold behavior of MOSFET's. For VGS < Vth, the channel conductance, gc, can be modeled by :
gc = Ic q
?q(VGS ? Vth)
All these currents add up, and are responsible for an energy dissipation of the form
V 2DD Ic q
where VGS = is assumed. At the present state of the
technology, energy dissipation due to leakage currents represents only a small fraction of the total power of a CMOS circuit.
Short-circuit currents originate in the short transients, as in the case of a CMOS inverter, when both pull-up and pull-down transistors conduct while the input signal switches between Vthn and VDD ? Vthp. This energy dissipation has the form :
si (VDD ? 2Vth)3 (4)
where the si's are proportionality constants, and the sum is made over all transitions executed in one operation. Short-circuit currents also play a significant role in storing a value into a flip-flop built from crosscoupled inverters.
Figure 1: Graph of ET=V 2DD against VDD for a 4-bit counter (SPICE simulation), and for the 3x+1 engine, and the 1:6?m and 2:0?m processors.
Dynamic energy dissipation, Ed, comes from the energy used to charge the capacitors in the circuit. The capacitors are then discharged to ground, and the energy is not recuperated. Ed can be computed as:
niCi ? V 2DD (5)
where the Ci's are all the capacitors in the circuit, and ni is the number of times the capacitor is switched in the execution of one operation. We rewrite Eq. 5 as:
Ed = KL ? V 2DD (6)
2.2 Linear Energy Model
Using Eqs. 4 and 6, and neglecting the effect of subthreshold currents, we rewrite the energy equation as:
ET = KL + KS (VDD ? 2Vth)3
V 2DD (7)
Outside the sub-threshold region, (VDD AE Vth), Eq. 7 simplifies to:
ET = (KL +KSVDD)V 2DD (8)
Figure 1 shows ET=V 2DD as a function of VDD for a 4-bit counter (SPICE simulation), and for the Caltech Asynchronous Microprocessor and for a 3x + 1 engine (measurement). This figure shows that the linear approximation of Eq. 7 is indeed accurate.
Based on these results, we propose as an index of performance for an asynchronous CMOS circuit, the corresponding constants KL and Ks. These indices