P-RISC graphs are parallel, structured, executable controlflow graphs that model locality properties of distributed memory machines. P-RISC graphs have coarse grain parallelism for distribution of work to processors, and fine grain parallelism to overlap latencies of remote accesses and synchronization. These properties support dynamic and irregular parallelism. In this paper, we describe P-RISC graphs, how they are used to implement the implicitly parallel programming language Id, and how they are implemented on distributed memory machines. We also contrast our approach to Berkeley's TAM, a similar system.